1. Field of the Invention
The present invention relates to an electroplating jig used for plating and anodic oxidation on a surface of, for example, a semiconductor wafer, a glass substrate, and a ceramic substrate.
2. Description of the Related Art
In recent years, plating technologies have been applied to various technology fields, and applied to a wiring technology of semiconductor devices too. In a semiconductor field, shrinkage of a wiring pitch of a semiconductor device has been required for achieving high integration and high performance of the device. As one of the wiring technology employed in recent years, there exists a method which fills a wiring material in a wiring groove by plating. The wiring groove is prepared by dry etching process after forming an interlayer dielectric film.
For successfully achieving these plating technologies, a uniform deposition of a plating material in the groove of a body to be plated (hereinafter, referred to as plating body) is essential. Therefore, an electroplating jig which is able to form a uniform plating film on a surface to be plated (hereinafter, referred to as plating surface) of the plating body has been proposed by the inventors of this application. This is disclosed in, for example, Japanese Laid-Open Patent Publication No. 2003-301299.
As shown in FIG. 5, the electroplating jig includes, as major parts, a cathode conductor 101 which supplies electric current to a plating surface of a semiconductor wafer 100 as the plating body, a first insulator 102 (hereinafter, referred to as insulator 102) covering a surface side (a plating surface 100A side) of the semiconductor wafer 100 and supporting the cathode conductor 101, and a second insulator 103 (hereinafter, referred to as back cap 103) covering a back side (an opposite side of the plating surface) of the semiconductor wafer and supporting the semiconductor wafer 100.
Here, the cathode conductor 101 includes a circular plate member 101A designed to surround the semiconductor 100 from a perimeter of the semiconductor, and approximately rectangular power connection plate member 101B which is bonded to the circular plate member 101A at one side and also connected to an external power source (not shown) at the other side. In addition, the circular plate member 101A has a plurality of protruded plate members 101C, 101C, . . . which are radially-inwardly protruded on the plating surface 100A side of the semiconductor 100. In each protruded plate member 101C, each of a plurality of convex members 101D, 101D, . . . which electrically contacts with a periphery of the plating surface 100A of each semiconductor wafer 100 are disposed.
Meanwhile, in the electroplating jig described in the Japanese Laid-Open Patent Publication No. 2003-301299, each convex member 101D of the cathode conductor 101 made of metal is contacted with the semiconductor 100 by fixing the back cap 103 to the insulator 102 by using a plurality of screws (not shown). Therefore, a load (a pushing force) from each convex member 101D is locally and concentratedly applied to the semiconductor 100. As a result, a contact portion of the semiconductor wafer 100 contacting with each convex member 101D breaks in some case, and also a crack originating from the contact portion of the semiconductor wafer 100 is caused in other case. In particular, in recent years, since a material strength of ultra-thin semiconductor wafer and large diameter semiconductor wafer is weak, the aforementioned problem such as the crack issue has become likely to happen.
The present invention has been made in view of the problems described above. Accordingly, it is an object of the present invention to provide an electroplating jig which has, for example, improved performance and reliability capable of solving issues such as breaking and damaging of a plating body, by preventing the plating body from being applied over-stress even if a conductive plate is contacted with the plating body, such as the ultra-thin semiconductor wafer which has a relatively weak material strength.